US 12,094,456 B2
Information processing method and system
Tianshi Chen, Pudong New Area (CN); Shaoli Liu, Pudong New Area (CN); Zai Wang, Pudong New Area (CN); and Shuai Hu, Pudong New Area (CN)
Assigned to SHANGHAI CAMBRICON INFORMATION TECHNOLOGY CO., LTD., Pudong New Area (CN)
Filed by Shanghai Cambricon Information Technology Co., Ltd., Pudong New Area (CN)
Filed on Dec. 11, 2020, as Appl. No. 17/119,093.
Application 17/119,093 is a continuation of application No. 16/760,235, previously published as PCT/CN2018/105463, filed on Sep. 13, 2018.
Prior Publication US 2021/0133854 A1, May 6, 2021
Int. Cl. G06F 16/9535 (2019.01); G06F 18/20 (2023.01); G06F 18/21 (2023.01); G06F 18/2431 (2023.01); G06F 18/40 (2023.01); G06N 3/04 (2023.01); G06N 3/08 (2023.01); G06Q 30/0601 (2023.01); G06T 1/20 (2006.01); G06T 3/4046 (2024.01); G10L 15/16 (2006.01); G10L 17/00 (2013.01); G10L 17/18 (2013.01)
CPC G10L 15/16 (2013.01) [G06F 16/9535 (2019.01); G06F 18/21 (2023.01); G06F 18/2431 (2023.01); G06F 18/285 (2023.01); G06F 18/40 (2023.01); G06N 3/04 (2013.01); G06N 3/08 (2013.01); G06Q 30/0631 (2013.01); G06T 1/20 (2013.01); G06T 3/4046 (2013.01); G10L 17/00 (2013.01); G10L 17/18 (2013.01); G06T 2200/28 (2013.01)] 13 Claims
OG exemplary drawing
 
1. An information processing method applied to a computation circuit, wherein the computation circuit comprises a communication circuit and an operation circuit, and the method comprises:
controlling, by the computation circuit, the communication circuit to obtain user data to be processed, wherein the user data is used to recommend product recommendation information of interest to the user;
controlling, by the computation circuit, the operation circuit to obtain and call an operation instruction to process the user data to obtain product recommendation information corresponding to the user data, wherein
the operation instruction is a preset instruction for product prediction and recommendation, and the product recommendation information comprises at least one target product recommended for the user, and
the operation circuit includes a primary operation module and a plurality of secondary operation modules, wherein the primary operation module is interconnected with the plurality of secondary operation modules by an interconnection module, and wherein the operation instruction is a convolution operation instruction,
the calling the operation instruction to process the user data includes:
controlling, by the computation circuit, the secondary operation modules to implement a convolution operation of input data and a convolution kernel in a convolutional neural network algorithm, wherein the input data is the user data and the convolutional neural network algorithm corresponds to the convolution operation instruction,
controlling, by the computation circuit, the interconnection module to implement data transfer between the primary operation module and the secondary operation modules, before a forward operation of a neural network fully connected layer starts, transferring, by the primary operation module, the input data to each secondary operation module through the interconnection module, and after the computation of the secondary operation modules is completed, splicing, by the interconnection module, output scalars of the respective secondary operation modules stage by stage to obtain an intermediate vector, and sending the intermediate vector back to the primary operation module,
controlling, by the computation circuit, the primary operation module to splice intermediate vectors corresponding of all input data into an intermediate result for subsequent operations, and
controlling, by the computation circuit, the primary operation module to add bias data to the intermediate result, and then performing an activation operation,
the method further comprises:
controlling, by a data dependency determination circuit of the primary operation module, to ensure that there is no consistency conflict in reading data from and writing data to a first storage circuit that caches the input data and output data, reading an input neuron vector from the first storage circuit, and sending the input neuron vector to the secondary operation modules through the interconnection module.