US 12,094,420 B2
Gate driving circuit and display device including the same
Kyu Jin Kim, Paju-si (KR); and Moon Soo Chung, Paju-si (KR)
Assigned to LG Display Co., Ltd., Seoul (KR)
Filed by LG DISPLAY CO., LTD., Seoul (KR)
Filed on Sep. 26, 2022, as Appl. No. 17/952,454.
Claims priority of application No. 10-2021-0130033 (KR), filed on Sep. 30, 2021.
Prior Publication US 2023/0096265 A1, Mar. 30, 2023
Int. Cl. G09G 3/3266 (2016.01); G09G 3/3233 (2016.01)
CPC G09G 3/3266 (2013.01) [G09G 3/3233 (2013.01); G09G 2300/0426 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0842 (2013.01); G09G 2300/0861 (2013.01); G09G 2310/0286 (2013.01); G09G 2320/0233 (2013.01)] 23 Claims
OG exemplary drawing
 
1. A gate driving circuit, comprising:
an (N-1)th signal transmitter to which a start pulse or carry signal, a shift clock, a gate-on voltage, a first gate-off voltage, and a second gate-off voltage are applied, wherein Nis a natural number; and
an Nth signal transmitter to which a carry signal from the (N-1)th signal transmitter, the shift clock, the gate-on voltage, the first gate-off voltage, and the second gate-off voltage are applied,
wherein each of the (N-1)th and Nth signal transmitters comprises:
a first outputter configured to output a first scan pulse that swings between the gate-on voltage and the first gate-off voltage;
a second outputter configured to output a second scan pulse that swings between the same gate-on voltage with a same polarity as the gate-on voltage of the first scan pulse and the second gate-off voltage different from the first gate-off voltage; and
a controller configured to control the first and second outputters, the controller including a VGH1 node to which the first gate-off voltage is directly applied, and
wherein the first gate-off voltage is set to be higher or lower than the second gate-off voltage.