US 12,094,418 B2
Display panel and display apparatus including the same
Keuntae Jung, Yongin-si (KR)
Assigned to SAMSUNG DISPLAY CO., LTD., Yongin-si (KR)
Filed by Samsung Display Co., Ltd., Yongin-si (KR)
Filed on Apr. 10, 2023, as Appl. No. 18/132,935.
Application 18/132,935 is a continuation of application No. 17/332,923, filed on May 27, 2021, granted, now 11,651,734.
Claims priority of application No. 10-2020-0186773 (KR), filed on Dec. 29, 2020.
Prior Publication US 2023/0245622 A1, Aug. 3, 2023
Int. Cl. G09G 3/3258 (2016.01); G09G 3/3291 (2016.01)
CPC G09G 3/3258 (2013.01) [G09G 3/3291 (2013.01); G09G 2310/0272 (2013.01)] 9 Claims
OG exemplary drawing
 
1. A display panel comprising:
a substrate comprising a display area including a component area and a main area at least partially surrounding the component area, and a peripheral area disposed outside the display area;
a first main pixel circuit disposed in the main area;
a first main display element arranged in the main area and electrically connected to the first main pixel circuit;
a first auxiliary pixel circuit disposed in the peripheral area and arranged in a same row as the first main pixel circuit;
a first auxiliary display element arranged in the component area, electrically connected to the first auxiliary pixel circuit, and arranged in a same row as the first main display element;
a second auxiliary pixel circuit disposed in the peripheral area and arranged in the same row as the first auxiliary pixel circuit and the first main pixel circuit;
a second auxiliary display element arranged in the component area, electrically connected to the second auxiliary pixel circuit, and arranged in the same row as the first auxiliary display element and the first main display element;
a first gate driving circuit disposed in the peripheral area and on a same side of the display area as the first auxiliary pixel circuit; and
a first gate line extending in a first direction and connecting the first main pixel circuit and the first auxiliary pixel circuit to the first gate driving circuit,
wherein the first auxiliary pixel circuit is arranged between the display area and the first gate driving circuit.