US 12,094,416 B1
Display panel and display device
Xi Chen, Wuhan (CN); and Qibing Wei, Wuhan (CN)
Assigned to Wuhan Tianma Micro-Electronics Co., Ltd., Wuhan (CN); and Wuhan Tianma Microelectronics Co., LTD. Shanghai Branch, Shanghai (CN)
Filed by Wuhan Tianma Micro-Electronics Co., Ltd., Wuhan (CN); and Wuhan Tianma Microelectronics Co., LTD. Shanghai Branch, Shanghai (CN)
Filed on Oct. 20, 2023, as Appl. No. 18/382,334.
Claims priority of application No. 202310389172.1 (CN), filed on Apr. 12, 2023.
Int. Cl. G09G 3/3233 (2016.01); H10K 59/131 (2023.01)
CPC G09G 3/3233 (2013.01) [H10K 59/131 (2023.02); G09G 2300/0426 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0852 (2013.01); G09G 2320/0209 (2013.01); G09G 2320/0233 (2013.01); G09G 2320/0247 (2013.01); G09G 2320/045 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A display panel, comprising:
a plurality of sub-pixels, wherein:
each of the plurality of sub-pixels includes a pixel circuit and a light-emitting element that are electrically connected to each other,
the pixel circuit at least includes a driving module and a compensation module, wherein a first terminal of the driving module is electrically connected to a first power signal line, a second terminal of the driving module is electrically connected to an anode of the light-emitting element, and a cathode of the light-emitting element is electrically connected to a second power signal line,
the compensation module includes a first double-gate transistor, wherein a first electrode of the first double-gate transistor is electrically connected to a control terminal of the driving module, a second electrode of the first double-gate transistor is electrically connected to the second terminal of the driving module, and a gate of the first double-gate transistor is connected to a first scan line, wherein the first scan line provides a first scan signal,
the pixel circuit further includes a voltage regulation module, and the first double-gate transistor includes a middle node, wherein a first terminal of the voltage regulation module is electrically connected to the middle node, and a second terminal of the voltage regulation module is electrically connected to a second scan line, wherein the second scan line provides a second scan signal, and
a phase of the second scan signal is opposite to a phase of the first scan signal.