US 12,094,100 B2
Measurement of stitching error using split targets
Mark Ghinovker, Yoqneam Ilit (IL); and Yoel Feler, Haifa (IL)
Assigned to KLA Corporation, Milpitas, CA (US)
Filed by KLA Corporation, Milpitas, CA (US)
Filed on Mar. 3, 2022, as Appl. No. 17/686,382.
Prior Publication US 2023/0281779 A1, Sep. 7, 2023
Int. Cl. G06T 7/68 (2017.01); G03F 9/00 (2006.01); G06T 7/00 (2017.01); G06T 7/73 (2017.01); H01L 21/027 (2006.01)
CPC G06T 7/0004 (2013.01) [G03F 9/7092 (2013.01); G06T 7/68 (2017.01); G06T 7/73 (2017.01); G06T 2207/30148 (2013.01); H01L 21/0274 (2013.01)] 22 Claims
OG exemplary drawing
 
1. A method of semiconductor metrology, comprising:
patterning a film layer on a semiconductor substrate to define a first field on the semiconductor substrate with a first pattern comprising at least a first target feature within a first margin along a first edge of the first field;
patterning the film layer on the semiconductor substrate to define a second field, which abuts the first field, with a second pattern comprising at least a second target feature within a second margin along a second edge of the second field, such that the second edge of the second field adjoins the first edge of the first field, and the first target feature in the first margin is adjacent to the second target feature in the second margin without overlapping the second target feature;
capturing an image of an area of the patterned film layer including at least the first and second target features; and
processing the image to detect a misalignment between the first field and the second field.