US 12,093,789 B2
Quantum code for reduced frequency collisions in qubit lattices
Andrew W. Cross, Yorktown Heights, NY (US); Christopher Chamberland, Southbury, CT (US); Jay M. Gambetta, Yorktown Heights, NY (US); Jared B. Hertzberg, Yorktown Heights, NY (US); Theodore J. Yoder, White Plains, NY (US); and Guanyu Zhu, Yorktown Heights, NY (US)
Assigned to INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US)
Filed by International Business Machines Corporation, Armonk, NY (US)
Filed on Jan. 13, 2023, as Appl. No. 18/154,075.
Application 18/154,075 is a continuation of application No. 16/542,094, filed on Aug. 15, 2019, granted, now 11,556,411.
Claims priority of provisional application 62/838,148, filed on Apr. 24, 2019.
Prior Publication US 2023/0205622 A1, Jun. 29, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G06N 10/70 (2022.01); G06F 11/10 (2006.01); G06N 10/40 (2022.01); G06F 11/07 (2006.01); H03M 13/15 (2006.01); H04L 9/08 (2006.01)
CPC G06N 10/70 (2022.01) [G06F 11/10 (2013.01); G06N 10/40 (2022.01); G06F 11/0751 (2013.01); H03M 13/1575 (2013.01); H04L 9/0852 (2013.01)] 15 Claims
OG exemplary drawing
 
1. A quantum computer, comprising:
a quantum processor, comprising:
a first plurality of qubits arranged in a hexagonal lattice pattern such that each is located at a hexagon apex of said hexagonal lattice pattern,
a second plurality of qubits each arranged along a hexagon edge of said hexagonal lattice pattern between and coupled to corresponding two of said first plurality of qubits,
wherein each of said first plurality of qubits is a target qubit,
wherein each of the first plurality of qubits has an associated target frequency, wherein the target frequency varies between a first target frequency and a second target frequency, and
wherein a defined order of target frequencies is assigned to the first plurality of qubits such that the first plurality of qubits are assigned the first target frequency and the second target frequency in an alternating pattern from one hexagon apex to a neighboring hexagon apex; and
an error correction device configured to operate on said hexagonal lattice pattern of said first and second plurality of qubits so as to detect and correct data errors.