CPC G06N 10/00 (2019.01) [G06F 9/30098 (2013.01); G06F 9/30145 (2013.01); G06F 9/382 (2013.01); G06F 9/3861 (2013.01); G06F 9/3869 (2013.01); G06F 9/5016 (2013.01); G06F 18/2323 (2023.01); G06N 10/40 (2022.01); G06N 10/60 (2022.01); G06N 10/70 (2022.01); G06N 10/80 (2022.01); H03M 13/1575 (2013.01); H03M 13/611 (2013.01)] | 20 Claims |
1. A quantum computing device, comprising:
at least one quantum register including a plurality of logical qubits;
a compression engine coupled to each logical qubit of the plurality of logical qubits, each compression engine configured to compress syndrome data; and
a decompression engine coupled to each compression engine, each decompression engine configured to:
receive compressed syndrome data;
decompress the received compressed syndrome data; and
route the decompressed syndrome data to a hardware decoder, the hardware decoder configured to:
receive the decompressed syndrome data; and
decode the received decompressed syndrome data by implementing a Union-Find decoding algorithm via a hardware microarchitecture including two or more pipeline stages.
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