CPC G06F 30/398 (2020.01) [G06F 2111/20 (2020.01); G06F 2115/02 (2020.01)] | 8 Claims |
1. A method for system-on-chip (SoC) verification, comprising:
establishing a component library comprising at least an interface protocol component, a bus protocol component and a verification component for the SoC;
creating a control file according to a verification requirement, wherein the control file is used for controlling a verification platform for verifying the SoC, and the control file comprises control parameters;
establishing a software library for each processor of the SoC to run according to the verification requirement of the SoC, and establishing an excitation library for corresponding components in the component library; wherein the software library comprises at least an execution software of each processor, and the excitation library comprises at least a generator for issuing an excitation of each universal interface protocol of a plurality of universal interface protocols;
establishing a script library comprising a plurality of script files based on the verification requirement and the control file; wherein the script library comprises a verification platform control file parsing script wherein the script library further comprises a verification environment generation script, a call register model generation script, a simulation script, a regression script and a register generation script;
parsing, by the script, the control file of the verification platform to obtain control parameters of the verification platform when a verification scenario is determined;
selecting a required component from the component library selecting a required excitation from the excitation library to generate the verification platform; and
wherein the script library further comprises a verification environment generation script, a call register model generation script, a simulation script, a regression script and a register generation script, according to the control parameters; and
verifying the SoC by the verification platform.
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