US 12,093,131 B2
Interface circuit, memory controller and method for calibrating signal processing devices in an interface circuit
Fu-Jen Shih, New Taipei (TW)
Assigned to Silicon Motion, Inc., Hsinchu County (TW)
Filed by Silicon Motion, Inc., Hsinchu County (TW)
Filed on Jun. 28, 2023, as Appl. No. 18/215,181.
Claims priority of application No. 112102049 (TW), filed on Jan. 17, 2023.
Prior Publication US 2024/0241786 A1, Jul. 18, 2024
Int. Cl. G06F 11/10 (2006.01); G06F 11/07 (2006.01); G06F 11/30 (2006.01)
CPC G06F 11/1068 (2013.01) [G06F 11/076 (2013.01); G06F 11/3037 (2013.01)] 18 Claims
OG exemplary drawing
 
16. A method for calibrating characteristic values of a plurality of signal processing devices comprised in a Serializer-Deserializer in an interface circuit of a data storage device, comprising:
monitoring, by a monitor and calibration module, at least one of an amplitude, a frequency and a jitter in at least one of a reception signal and a transmission signal to generate a monitored result corresponding to the at least one of the amplitude, the frequency and the jitter in the at least one of the reception signal and the transmission signal;
monitoring, by the monitor and calibration module, at least one of a power supplying voltage and a ground voltage to generate a monitored result;
collecting the monitored results and determining a calibration operation based on the monitored results corresponding to the at least one of the power supplying voltage and the ground voltage; and
performing, by at least one calibration circuit of the monitor and calibration module, the calibration operation on at least one of the signal processing devices to adjust a characteristic value of the at least one of the signal processing devices.