US 12,093,124 B2
Multi-level signal reception
Aaron D Willey, Hayward, CA (US); Karthik Gopalakrishnan, Cupertino, CA (US); Pradeep Jayaraman, San Jose, CA (US); and Ramon Mangaser, Arlington, MA (US)
Assigned to Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed by Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed on Sep. 29, 2022, as Appl. No. 17/956,542.
Prior Publication US 2024/0111618 A1, Apr. 4, 2024
Int. Cl. G06F 11/07 (2006.01)
CPC G06F 11/079 (2013.01) [G06F 11/073 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for receiving a multi-level error signal having more than two logic levels, comprising:
oversampling the multi-level error signal to provide sampled symbols, wherein a first level of the multi-level error signal indicates no error, and second and third levels of the multi-level error signal indicate first and second error conditions, respectively;
de-serializing said sampled symbols to provide sets of symbols;
determining a start of a symbol period in response to detecting that a given sample is different from a prior sample, and said prior sample indicates no error; and
filtering said sets of symbols to provide corresponding output symbols based on said start.