US 12,093,101 B2
Systems and methods for peak power control
Vlad Fruchter, Los Altos, CA (US); Nishant Sitapara, Denver, CO (US); Javid Jaffari, San Diego, CA (US); Shrirang Madhav Yardi, San Jose, CA (US); and Bardia Zandian, Redwood City, CA (US)
Assigned to Meta Platforms Technologies, LLC, Menlo Park, CA (US)
Filed by Meta Platforms Technologies, LLC, Menlo Park, CA (US)
Filed on Feb. 28, 2022, as Appl. No. 17/682,917.
Claims priority of provisional application 63/284,286, filed on Nov. 30, 2021.
Prior Publication US 2023/0168729 A1, Jun. 1, 2023
Int. Cl. G06F 1/28 (2006.01); G02B 27/01 (2006.01); G05F 1/66 (2006.01)
CPC G06F 1/28 (2013.01) [G02B 27/017 (2013.01); G05F 1/66 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
identifying, by one or more control circuitries of a device, a condition for the device;
applying, by the one or more control circuitries, the condition for the device to one or more models maintained for a plurality of device processing units of the device to determine one or more performance characteristics for the plurality of device processing units, each device processing unit having a respective peak power which is a portion of an aggregate peak power of the device, the plurality of device processing units including a first device processing unit comprising one of a central processing unit (CPU), a graphics processing unit (GPU), a display interface, a sensing unit, a compression unit, a camera unit, an input/output (I/O) unit, a decoder, or an encoder, and a second device processing unit comprising a different one of the CPU, the GPU, the display interface, the sensing unit, the compression unit, the camera unit, the I/O unit, the decoder, or the encoder; and
distributing, by the one or more control circuitries, power credits to the plurality of device processing units of the device, including a first number of power credits to the first device processing unit and a second number of power credits to the second device processing unit, according to the determined performance characteristics for the plurality of device processing units, to manage the respective peak power for each respective device processing unit according to a number of the power credits distributed to the respective device processing unit, wherein
the one or more control circuitries distributes the power credits to the plurality of device processing units, according to an impact of quality of service (QoS) levels for a respective device processing unit to a device QoS for the device.