US 12,093,073 B2
Transmit side of low voltage drive circuit (LVDC) with non-sync data channels
Richard Stuart Seger, Jr., Belton, TX (US); Daniel Keith Van Ostrand, Leander, TX (US); Gerald Dale Morrison, Redmond, WA (US); and Timothy W. Markison, Mesa, AZ (US)
Assigned to SigmaSense, LLC., Austin, TX (US)
Filed by SigmaSense, LLC., Wilmington, DE (US)
Filed on Jun. 14, 2023, as Appl. No. 18/334,575.
Application 18/334,575 is a continuation of application No. 17/653,398, filed on Mar. 3, 2022, granted, now 11,681,323.
Application 17/653,398 is a continuation of application No. 17/217,822, filed on Mar. 30, 2021, granted, now 11,294,420, issued on Apr. 5, 2022.
Application 17/217,822 is a continuation of application No. 16/266,953, filed on Feb. 4, 2019, granted, now 11,003,205, issued on May 11, 2021.
Prior Publication US 2023/0324950 A1, Oct. 12, 2023
Int. Cl. G06F 1/10 (2006.01); H03K 19/17784 (2020.01); H03M 1/12 (2006.01); H04B 1/40 (2015.01)
CPC G06F 1/10 (2013.01) [H03K 19/17784 (2013.01); H03M 1/1255 (2013.01); H04B 1/40 (2013.01)] 7 Claims
OG exemplary drawing
 
1. A low voltage drive circuit (LVDC) comprising:
a data splitter configured to split transmit digital data into a plurality of streams of digital data;
a plurality of signal generators operable-configured to:
receive the plurality of streams of digital data at a plurality of data rates, wherein a first signal generator of the plurality of signal generators receives a first stream of digital data of the plurality of streams of digital data at a first data rate of the plurality of data rates, and wherein a second signal generator of the plurality of signal generators receives a second stream of digital data of the plurality of streams of digital data at a second data rate of the plurality of data rates; and
generate a plurality of analog outbound data signals for the plurality of streams of digital data, wherein the first signal generator generates a first analog outbound data signal of the plurality of analog outbound signals, wherein the first analog outbound data signal corresponds to the first stream of digital data, wherein the first analog outbound signal has a first frequency that corresponds to an inverse of the first data rate, wherein the second signal generator generates a second analog outbound data signal of the plurality of analog outbound signals, wherein the second analog outbound data signal corresponds to the second stream of digital data, and wherein the second analog outbound signal has a second frequency that corresponds to an inverse of the second data rate;
a signal combiner configured to combine the plurality of analog outbound data signals into analog outbound data; and
a drive sense circuit configured to drive the analog outbound data onto a bus.