US 12,419,096 B2
Transistor device and method of manufacturing
Ralf Siemieniec, Villach (AT); Ingo Muri, Villach (AT); Till Schloesser, Munich (DE); Hans-Joachim Schulze, Taufkirchen (DE); and Olaf Storbeck, Dresden (DE)
Assigned to INFINEON TECHNOLOGIES AG, Neubiberg (DE)
Filed by Infineon Technologies AG, Neubiberg (DE)
Filed on Feb. 1, 2022, as Appl. No. 17/590,685.
Claims priority of application No. 21155278 (EP), filed on Feb. 4, 2021.
Prior Publication US 2022/0246744 A1, Aug. 4, 2022
Int. Cl. H10D 64/66 (2025.01); H01L 25/07 (2006.01); H10D 30/60 (2025.01); H10D 64/01 (2025.01)
CPC H10D 64/665 (2025.01) [H01L 25/072 (2013.01); H10D 30/60 (2025.01); H10D 64/01 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A transistor device, comprising:
a semiconductor body having a first main surface, a second main surface opposite to the first main surface, and a transistor cell array, wherein:
the transistor cell array comprises:
a plurality of transistor cells;
a first load electrode over the first main surface, wherein the first load electrode is electrically connected to the plurality of transistor cells; and
a second load electrode over the second main surface, wherein the second load electrode is electrically connected to the plurality of transistor cells;
the plurality of transistor cells comprises at least one control electrode comprising carbon;
the carbon of the at least one control electrode comprises at least one of allotropes single-layered graphene, double-layered graphene, multi-layered graphene, graphenic-like carbon or carbon nanotubes;
the at least one control electrode comprises a gate electrode;
a cap layer is over the gate electrode;
a gate dielectric separates the gate electrode from the semiconductor body;
the cap layer is at least one of (i) directly over and in contact with a vertical portion of the gate dielectric or (ii) directly over an entirety of the gate dielectric and in contact with the gate dielectric; and
an interlayer dielectric is over the cap layer, wherein the interlayer dielectric separates the gate electrode and a front side electrode.