US 12,419,081 B2
Silicon-on-insulator substrate and method of manufacturing the same
Chunyuan Qi, Singapore (SG); Sheng Zhang, Singapore (SG); Xingxing Chen, Singapore (SG); and Chien-Kee Pang, Singapore (SG)
Assigned to UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed by UNITED MICROELECTRONICS CORP., Hsin-Chu (TW)
Filed on Oct. 26, 2021, as Appl. No. 17/510,392.
Claims priority of application No. 202111119692.8 (CN), filed on Sep. 24, 2021.
Prior Publication US 2023/0094739 A1, Mar. 30, 2023
Int. Cl. H10D 30/67 (2025.01); H10D 30/69 (2025.01); H10D 62/83 (2025.01)
CPC H10D 30/6744 (2025.01) [H10D 30/751 (2025.01); H10D 62/83 (2025.01)] 4 Claims
OG exemplary drawing
 
1. A method of manufacturing a silicon-on-insulator substrate, comprising:
forming a carbon-doped polysilicon trap-rich layer on a handler;
forming an organosilane-based oxide layer on said carbon-doped polysilicon trap-rich layer;
bonding a surface of a bulk silicon wafer directly on a surface of said organosilane-based oxide layer, wherein said surface of said bulk silicon wafer has no insulating layer formed thereon, and said bonding comprises:
performing a plasma treatment to said surface of said bulk silicon wafer and said surface of said organosilane-based oxide layer; and
after bonding said surface of said bulk silicon wafer and said surface of said organosilane-based oxide layer, performing a heat treatment to form stronger bonding between said surface of said bulk silicon wafer and said surface of said organosilane-based oxide layer;
performing a thinning process and a trimming process to said bulk silicon wafer through a grinding process to form a monocrystalline silicon layer.