US 12,419,079 B2
Field effect transistor with backside source/drain
Ruilong Xie, Niskayuna, NY (US); Lawrence A. Clevenger, Saratoga Springs, NY (US); Brent A. Anderson, Jericho, VT (US); Kisik Choi, Watervliet, NY (US); Su Chen Fan, Cohoes, NY (US); Shogo Mochizuki, Mechanicville, NY (US); and Son Nguyen, Schenectady, NY (US)
Assigned to International Business Machines Corporation, Armonk, NY (US)
Filed by INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US)
Filed on Oct. 4, 2022, as Appl. No. 17/937,967.
Prior Publication US 2024/0113176 A1, Apr. 4, 2024
Int. Cl. H01L 29/417 (2006.01); H01L 23/528 (2006.01); H01L 29/06 (2006.01); H01L 29/40 (2006.01); H01L 29/66 (2006.01); H01L 29/775 (2006.01); H10D 30/01 (2025.01); H10D 30/43 (2025.01); H10D 30/67 (2025.01); H10D 62/10 (2025.01); H10D 64/01 (2025.01)
CPC H10D 30/6729 (2025.01) [H01L 23/5286 (2013.01); H10D 30/014 (2025.01); H10D 30/43 (2025.01); H10D 62/121 (2025.01); H10D 64/01 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
an insulating layer; and
a transistor upon the insulating layer, the transistor includes one or more channel regions, a first source or drain (S/D) region upon the insulating layer and connected to the one or more channel regions, and a second S/D region that includes a conduit liner and an inner column, wherein the conduit liner includes a liner around an internal conduit, wherein the liner is upon the insulating layer and is connected to the one or more channel regions, wherein the inner column is composed of a doped semiconductor material and is within the internal conduit of the liner, and wherein the inner column extends below a top surface of the insulating layer.