| CPC H10D 30/62 (2025.01) [H10D 30/0243 (2025.01); H10D 62/151 (2025.01); H10D 64/017 (2025.01)] | 20 Claims |
|
1. A method comprising:
forming a fin on a semiconductor substrate;
forming a dummy gate stack over the fin;
etching the fin adjacent the dummy gate stack using a first etch process to form a first recess;
etching the first recess using a second etch process to form a second recess, the second etch process etching a (100) crystal plane of the fin at a first etch rate, the second etch process etching a (110) crystal plane of the fin at a second etch rate, the second etch process etching a (111) crystal plane of the fin at a third etch rate, the first etch rate being greater than each of the second and third etch rates;
forming a source/drain region in the second recess; and
replacing the dummy gate stack with a gate stack.
|