| CPC H10D 30/015 (2025.01) [H01L 21/02458 (2013.01); H01L 21/0254 (2013.01); H01L 21/2257 (2013.01); H10D 30/475 (2025.01); H10D 62/8503 (2025.01)] | 8 Claims |

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1. A method for fabricating a high electron mobility transistor (HEMT), comprising:
forming a buffer layer on a substrate;
forming a barrier layer on the buffer layer;
forming a p-type semiconductor layer on the barrier layer;
patterning the p-type semiconductor layer;
forming a passivation layer on the p-type semiconductor layer;
patterning the passivation layer to expose the p-type semiconductor layer;
forming a silicon layer on the p-type semiconductor layer;
forming a gate electrode on the silicon layer;
performing an anneal process to transform the silicon layer into a hole injection buffer layer (HIBL); and
forming a source electrode and a drain electrode adjacent to two sides of the gate electrode.
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