CPC H10K 59/131 (2023.02) [G09G 3/3233 (2013.01); G09G 2300/0408 (2013.01); G09G 2300/0426 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0852 (2013.01); G09G 2300/0861 (2013.01); G09G 2320/0214 (2013.01); H10K 59/124 (2023.02)] | 20 Claims |
1. A display device comprising:
a substrate; and
a semiconductor layer comprising a driving transistor and a fourth transistor on the substrate,
a first electrode of the driving transistor connected to a driving voltage line to receive a driving voltage,
a first electrode of the fourth transistor connected to a first initialization voltage line to receive a first initialization voltage,
a second electrode of the fourth transistor is connected to a gate electrode of the driving transistor,
a low doping region between a channel of the fourth transistor and the first electrode of the fourth transistor, and
wherein a low doping region is not between the channel of the fourth transistor and the second electrode of the fourth transistor.
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