CPC H04N 25/78 (2023.01) [H03M 7/16 (2013.01); H04N 25/616 (2023.01)] | 20 Claims |
1. A gray code-to-binary code converter comprising:
multiple parallel-in parallel-out (PIPO) latches, each of the multiple PIPO latches configured to output a parallel output gray code by latching a parallel input gray code in response to a sampling signal; and
a parallel-in serial-out (PISO) circuit including a first group of switches, the PISO circuit configured to
convert the parallel output gray code, which is latched in the multiple PIPO latches, into a binary code, and
sequentially output bits of the binary code in units of bit, from a least significant bit (LSB) of the binary code to a most significant bit (MSB) of the binary code, while changing an arrangement of the first group of switches.
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