CPC H04N 19/14 (2014.11) [H04N 19/174 (2014.11); H04N 19/423 (2014.11)] | 20 Claims |
1. A decoder, comprising:
one or more processors; and
a non-transitory computer-readable storage medium coupled to the processors and storing programming instructions, which when executed by the one or more processors, cause the decoder to perform operations, the operations comprising:
obtaining a bitstream for a current picture;
obtaining a quantity of tiles in a tile row of the current picture;
obtaining a value of an address of a slice of the current picture;
obtaining a value of a horizontal coordinate according to the value of the address of the slice, wherein the value of the horizontal coordinate indicates a horizontal address in tile index; and
parsing an indication value for a slice width from the bitstream for the current picture, when a difference value between the quantity of tiles in the tile row of the current picture and the value of the horizontal coordinate is not equal to a first threshold.
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