CPC H04L 27/2271 (2013.01) [H03L 7/22 (2013.01); H04L 27/2275 (2013.01)] | 23 Claims |
1. A method for processing a digital bit stream, wherein the digital bit stream is a digitized communication signal, the method comprising:
dividing, at one or more processors, the digital bit stream into a plurality of data packets;
in a first processing block of the one or more processors,
performing a carrier recovery error calculation on a first portion of the plurality of data packets, comprising preforming a first phase locked loop (PLL) function on decimated data of the first portion of the plurality of data packets, and
performing a carrier recovery operation on the first portion of the plurality of data packets;
in a second processing block of the one or more processors, in parallel with the process of performing the carrier recovery error calculation and the carrier recovery operation on the first portion of the plurality of data packets,
performing the carrier recovery error calculation on a second portion of the plurality of data packets, comprising preforming the first PLL function on decimated data of the second portion of the plurality of data packets, and
performing the carrier recovery operation on the second portion of the plurality of data packets; and
combining the first portion of the plurality of data packets and the second portion of the plurality of data packets based on phase stitching.
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