US 12,088,320 B2
Electronic device for low density parity check decoding, and method therefor
Robert Maunder, Southampton (GB); Matthew Brejza, Southampton (GB); and Peter Hailes, Southampton (GB)
Assigned to AccelerComm Limited, Southampton (GB)
Appl. No. 17/925,587
Filed by AccelerComm Limited, Southampton (GB)
PCT Filed May 14, 2021, PCT No. PCT/EP2021/062889
§ 371(c)(1), (2) Date Nov. 15, 2022,
PCT Pub. No. WO2021/233789, PCT Pub. Date Nov. 25, 2021.
Claims priority of application No. 2007341 (GB), filed on May 18, 2020.
Prior Publication US 2023/0208440 A1, Jun. 29, 2023
Int. Cl. H03M 13/11 (2006.01); H03M 13/00 (2006.01); H04L 1/00 (2006.01)
CPC H03M 13/1137 (2013.01) [H03M 13/1111 (2013.01); H04L 1/0057 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An electronic device comprises:
a check node, CN, processor having a plurality of input-output, I-O, ports and configured to receive soft bits associated with one or more rows within a same blockrow of a parity check matrix, PCM, derived from at least one basegraph, and perform a series of low density parity check, LDPC, decoding operations that use the at least one basegraph that comprises two or more columns, each column associated with a set of two or more soft bit values;
two or more rotators, each rotator configured to rotate an order of a subset of two or more soft bit values of the set of two or more soft bit values of a column when activated in an LDPC decoding operation that comprises at least two sub-steps grouped into each of a first set and a second set; and
a controller operably coupled to the two or more rotators and configured to independently control an activation and a rotation of a subset of each of the two or more rotators based on a current LDPC decoding operation and the at least one basegraph;
wherein rotations associated with each column in each of the at least one basegraph are performed by a particular one of the rotators of the two or more rotators, wherein each rotator performs rotations for a set of one or more columns, with at least one of the rotators performing rotations for two or more columns in a same basegraph,
wherein the controller is configured to activate rotators corresponding to a subset of the two or more columns that has a binary value of ‘1’ in a row of the at least one basegraph; and
wherein each LDPC decoding operation comprises processing rows in which a number of binary values of ‘1’ in core columns of a first basegraph of the at least one basegraph exceeds a number of rotators used, nrot using a first set of two or more sub-steps and a second set of two or more sub-steps.