US 12,088,310 B2
Calibration method for phase-locked loops and related circuit
Davide Nicolo Fortunato, Catania (IT); Antonino Calcagno, Messina (IT); Marco Vinciguerra, Catania (IT); Angelo Scuderi, Catania (IT); and Gaetano Cosentino, Catania (IT)
Assigned to STMicroelectronics S.r.l., Agrate Brianza (IT)
Filed by STMicroelectronics S.r.l., Agrate Brianza (IT)
Filed on Mar. 29, 2023, as Appl. No. 18/192,285.
Claims priority of application No. 102022000007268 (IT), filed on Apr. 12, 2022.
Prior Publication US 2023/0327677 A1, Oct. 12, 2023
Int. Cl. H03L 7/099 (2006.01); H03L 7/087 (2006.01); H03L 7/10 (2006.01); H03L 7/113 (2006.01)
CPC H03L 7/0992 (2013.01) [H03L 7/087 (2013.01); H03L 7/099 (2013.01); H03L 7/103 (2013.01); H03L 7/113 (2013.01); H03L 2207/06 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of calibrating a voltage-controlled oscillator (VCO) in a phase-locked loop circuit, the method comprising a dichotomous search in a set of candidate frequency bands via a sequence of subsequent halving steps with index i=1, . . . , N that produce reduced subsets of the set of candidate frequency bands, the reduced subsets having respective upper bound values, lower bound values, and central values, a central value of a subset resulting from the halving step of the index i in the sequence being a function of an average of an upper bound value and a lower bound value of a subset resulting from the halving step of index i−1 in the sequence, the method comprising:
identifying a desired calibration frequency for the VCO, f_des_cycle, as a number of cycles counted in a reference clock signal;
reading a current frequency value, read_freq, which is a function of a current operation frequency of the VCO;
performing the dichotomous search by:
storing a stored frequency value store_read_freq[i]=read_freq for i=1; and
calculating a first modulus value, |f_des_cycle−store_read_freq[i]| and a second modulus value, |f_des_cycle−store_read_freq[i−1]|;
checking whether the first modulus value, |f_des_cycle−store_read_freq[i]| is lower than the second modulus value|f_des_cycle−store_read_freq[i−1]|;
in response to the checking yielding a positive outcome, performing a further halving step in the dichotomous search with the index i increased by one; or
in response to the checking yielding a negative outcome:
reducing by one the respective upper bound and lower bound of a current subset in the dichotomous search prior to resuming the dichotomous search in response to read_freq being higher than f_des_cycle plus a tolerance value; or
increasing by one the respective upper bound and lower bound of the current subset in the dichotomous search prior to resuming the dichotomous search in response to read_freq being lower than f_des_cycle minus the tolerance value; and
calibrating the VCO to a frequency resulting from the dichotomous search.