US 12,087,866 B2
Semiconductor device, method for manufacturing semiconductor device, module, and electronic device
Kosei Noda, Kanagawa (JP)
Assigned to Semiconductor Energy Laboratory Co., Ltd., Atsugi (JP)
Filed by SEMICONDUCTOR ENERGY LABORATORY CO., LTD., Atsugi (JP)
Filed on Feb. 23, 2021, as Appl. No. 17/182,269.
Application 17/182,269 is a continuation of application No. 14/949,959, filed on Nov. 24, 2015, abandoned.
Claims priority of application No. 2014-244302 (JP), filed on Dec. 2, 2014.
Prior Publication US 2021/0175362 A1, Jun. 10, 2021
Int. Cl. H01L 29/24 (2006.01); H01L 21/425 (2006.01); H01L 29/22 (2006.01); H01L 29/66 (2006.01); H01L 29/786 (2006.01)
CPC H01L 29/7869 (2013.01) [H01L 21/425 (2013.01); H01L 29/22 (2013.01); H01L 29/24 (2013.01); H01L 29/66969 (2013.01); H01L 29/78696 (2013.01)] 2 Claims
OG exemplary drawing
 
1. A display device comprising a pixel,
wherein the pixel comprises:
a transistor;
a capacitor;
a light-emitting element over the transistor, the light-emitting element comprising a light-emitting layer;
a partition wall over the capacitor; and
a first insulator,
wherein the capacitor comprises:
a first conductor over a substrate;
a second insulator over the first conductor;
a third insulator over the second insulator;
a second conductor over and in contact with the third insulator;
a fourth insulator over the second conductor; and
a third conductor over the fourth insulator,
wherein at least one of the first conductor and the third conductor is configured to be one electrode of the capacitor, and the second conductor is configured to be the other electrode of the capacitor,
wherein the transistor comprises an oxide semiconductor layer, in which the oxide semiconductor layer of the transistor is over and in contact with the third insulator,
wherein the light-emitting layer is over the partition wall,
wherein the first insulator is over the fourth insulator,
wherein the first insulator is between the second conductor and the third conductor, and
wherein the fourth insulator does not exist in a region where the first conductor, the second conductor, and the third conductor overlap with each other, while leaving the second conductor and the third conductor insulated from one another with the first insulator interposed therebetween in the region.