US 12,087,862 B2
Semiconductor device
Sungmin Kim, Suwon-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Jun. 1, 2023, as Appl. No. 18/204,550.
Application 18/204,550 is a continuation of application No. 17/126,260, filed on Dec. 18, 2020, granted, now 11,670,719.
Claims priority of application No. 10-2020-0087513 (KR), filed on Jul. 15, 2020.
Prior Publication US 2023/0327023 A1, Oct. 12, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 29/78 (2006.01); H01L 21/84 (2006.01); H01L 27/12 (2006.01); H01L 29/06 (2006.01); H01L 29/36 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01)
CPC H01L 29/7856 (2013.01) [H01L 21/845 (2013.01); H01L 27/1211 (2013.01); H01L 29/0653 (2013.01); H01L 29/42376 (2013.01); H01L 29/6653 (2013.01); H01L 29/66553 (2013.01); H01L 29/6681 (2013.01); H01L 29/36 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a substrate;
a first semiconductor pattern on the substrate, the first semiconductor pattern including a first part protruding from an upper surface of the substrate and a second part on the first part;
a semiconductor oxide layer between the first part and the second part;
a second semiconductor pattern on the first semiconductor pattern and spaced apart from the first semiconductor pattern in a vertical direction;
a gate electrode covering the second part and surrounding the second semiconductor pattern; and
source/drain patterns on opposite sides of the second semiconductor pattern,
wherein the entire semiconductor oxide layer is vertically overlapped by a lower surface of the second part.