US 12,087,859 B2
Method for improving transistor performance
Steven Kummerl, Carrollton, TX (US); Matthew John Sherbin, Dallas, TX (US); and Saumya Gandhi, Irving, TX (US)
Assigned to TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed by Texas Instruments Incorporated, Dallas, TX (US)
Filed on Oct. 1, 2019, as Appl. No. 16/589,951.
Application 16/589,951 is a continuation of application No. 15/136,097, filed on Apr. 22, 2016, granted, now 10,431,684.
Prior Publication US 2020/0035833 A1, Jan. 30, 2020
Int. Cl. H01L 29/78 (2006.01); H01L 21/268 (2006.01); H01L 21/324 (2006.01); H01L 21/78 (2006.01); H01L 29/04 (2006.01); H01L 29/16 (2006.01)
CPC H01L 29/7849 (2013.01) [H01L 21/268 (2013.01); H01L 21/324 (2013.01); H01L 21/78 (2013.01); H01L 29/04 (2013.01); H01L 29/16 (2013.01)] 16 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a semiconductor die including a surface, a first zone and a second zone within the semiconductor die;
the first zone extending to a first depth from the surface, the first zone including field effect transistors; and
the second zone at a second depth, which is greater than the first depth, the second zone including a different crystalline structure than that of the first zone, wherein the second zone extends across two opposite side surfaces of the semiconductor die, the two opposite side surfaces being vertical to a plane parallel to the surface, and wherein the first zone includes a same crystalline structure within the first zone, and wherein the surface is a top most surface of the semiconductor device, wherein the polycrystalline semiconductor is created in response to a laser.