US 12,087,839 B2
Transistor gate electrodes with voids
Shahaji B. More, Hsinchu (TW); and Chandrashekhar Prakash Savant, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Apr. 12, 2023, as Appl. No. 18/299,438.
Application 18/299,438 is a continuation of application No. 17/212,367, filed on Mar. 25, 2021, granted, now 11,640,983.
Claims priority of provisional application 63/082,534, filed on Sep. 24, 2020.
Claims priority of provisional application 63/065,563, filed on Aug. 14, 2020.
Prior Publication US 2023/0253472 A1, Aug. 10, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 29/49 (2006.01); H01L 29/10 (2006.01); H01L 29/66 (2006.01)
CPC H01L 29/4916 (2013.01) [H01L 29/1033 (2013.01); H01L 29/66545 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A device comprising:
a gate spacer over a substrate, the gate spacer having a bowed sidewall;
a gate dielectric extending along the bowed sidewall of the gate spacer;
a gate electrode over the gate dielectric, the gate electrode comprising:
a work function tuning layer over the gate dielectric;
a glue layer over the work function tuning layer;
a fill layer over the glue layer; and
a void defined by inner surfaces of the fill layer, the glue layer, or the work function tuning layer, a material of the gate electrode at the inner surfaces comprising a work function tuning element.