US 12,087,799 B2
Solid-state imaging element and electronic device
Yusuke Otake, Kanagawa (JP); Toshifumi Wakano, Kanagawa (JP); and Takuro Murase, Kanagawa (JP)
Assigned to SONY SEMICONDUCTOR SOLUTIONS CORPORATION, Kanagawa (JP)
Appl. No. 17/273,585
Filed by SONY SEMICONDUCTOR SOLUTIONS CORPORATION, Kanagawa (JP)
PCT Filed Sep. 5, 2019, PCT No. PCT/JP2019/034901
§ 371(c)(1), (2) Date Mar. 4, 2021,
PCT Pub. No. WO2020/059510, PCT Pub. Date Mar. 26, 2020.
Claims priority of application No. 2018-174517 (JP), filed on Sep. 19, 2018.
Prior Publication US 2021/0343777 A1, Nov. 4, 2021
Int. Cl. H01L 27/146 (2006.01); H01L 27/148 (2006.01); H04N 25/65 (2023.01); H04N 25/771 (2023.01)
CPC H01L 27/14643 (2013.01) [H01L 27/14612 (2013.01); H01L 27/1462 (2013.01); H01L 27/14636 (2013.01); H01L 27/14831 (2013.01); H04N 25/65 (2023.01); H04N 25/771 (2023.01)] 19 Claims
OG exemplary drawing
 
1. A solid-state imaging element, comprising:
a pixel, including:
a photodiode;
a floating diffusion that accumulates charges generated in the photodiode; and
a charge holding unit,
wherein the charge holding unit includes a wiring capacitance formed by a first wiring connected to a first potential and a second wiring connected to a second potential different from the first potential,
wherein, in a plan view, at least a part of the first wiring and at least a part of the second wiring are surrounded by a third wiring that is connected to a fixed potential.