US 12,087,794 B2
Solid-state imaging device, solid-state imaging device manufacturing method, and electronic device
Katsunori Hiramatsu, Kanagawa (JP)
Assigned to Sony Semiconductor Solutions Corporation, Kanagawa (JP)
Appl. No. 17/283,164
Filed by SONY SEMICONDUCTOR SOLUTIONS CORPORATION, Kanagawa (JP)
PCT Filed Oct. 15, 2019, PCT No. PCT/JP2019/040472
§ 371(c)(1), (2) Date Apr. 6, 2021,
PCT Pub. No. WO2020/080356, PCT Pub. Date Apr. 23, 2020.
Claims priority of application No. 2018-195679 (JP), filed on Oct. 17, 2018.
Prior Publication US 2021/0343774 A1, Nov. 4, 2021
Int. Cl. H01L 27/146 (2006.01)
CPC H01L 27/14634 (2013.01) [H01L 27/14636 (2013.01); H01L 27/14683 (2013.01)] 8 Claims
OG exemplary drawing
 
1. A solid-state imaging device manufacturing method, comprising:
forming a groove on one surface of a first semiconductor substrate;
stacking a second semiconductor substrate, a second insulating layer, the first semiconductor substrate, and a first insulating layer in this order so that the one surface of the first semiconductor substrate and the second insulating layer face each other; and
removing the first semiconductor substrate until the groove is exposed from another surface of the first semiconductor substrate on a side opposite to the one surface of the first semiconductor substrate,
wherein the groove forms a first side wall and a second side wall, and wherein a part of at least one of the first side wall or the second side wall extends in an oblique direction with respect to the one surface of the first semiconductor substrate.