US 12,087,713 B2
Gallium nitride integrated circuits including non-gold-based metallic materials
Daniel Piedra, Somerville, MA (US); James G. Fiorenza, Carlisle, MA (US); Puneet Srivastava, Wilmington, MA (US); Andrew Proudman, Medford, MA (US); Kenneth Flanders, Reading, MA (US); Denis Michael Murphy, Concord, MA (US); Leslie P. Green, Framingham, MA (US); and Peter R. Stubler, Andover, MA (US)
Assigned to Analog Devices, Inc., Wilmington, MA (US)
Filed by Analog Devices, Inc., Wilmington, MA (US)
Filed on Dec. 30, 2022, as Appl. No. 18/148,982.
Application 18/148,982 is a continuation of application No. 17/061,075, filed on Oct. 1, 2020, granted, now 11,569,182.
Claims priority of provisional application 62/924,466, filed on Oct. 22, 2019.
Prior Publication US 2023/0154875 A1, May 18, 2023
Int. Cl. H01L 23/66 (2006.01); H01L 21/285 (2006.01); H01L 21/8252 (2006.01); H01L 23/48 (2006.01); H01L 27/06 (2006.01); H01L 29/20 (2006.01); H01L 29/205 (2006.01); H01L 29/45 (2006.01); H01L 29/66 (2006.01); H01L 29/778 (2006.01); H01L 49/02 (2006.01); H01L 23/532 (2006.01); H01L 29/417 (2006.01)
CPC H01L 23/66 (2013.01) [H01L 21/28575 (2013.01); H01L 21/8252 (2013.01); H01L 23/481 (2013.01); H01L 27/0605 (2013.01); H01L 27/0629 (2013.01); H01L 28/60 (2013.01); H01L 29/2003 (2013.01); H01L 29/205 (2013.01); H01L 29/452 (2013.01); H01L 29/66462 (2013.01); H01L 29/7786 (2013.01); H01L 23/53214 (2013.01); H01L 29/4175 (2013.01); H01L 2223/6616 (2013.01); H01L 2223/6683 (2013.01); H01L 2924/1423 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A device having a monolithic microwave integrated circuit comprises:
a substrate having:
a barrier layer disposed on the substrate, the barrier layer including an aluminum gallium nitride (AlGaN) material and including a drain region, a source region, and a gate region; and
a channel layer disposed between a surface of the substrate and the barrier layer, the channel layer including a gallium nitride (GaN) material;
a gate electrical contact disposed on the gate region of the barrier layer, the gate electrical contact including one or more non-gold-based metallic materials;
a source electrical contact disposed on the source region of the barrier layer, the source electrical contact including a non-gold-based metallic material of the one or more non-gold-based metallic materials;
a drain electrical contact disposed on the drain region of the barrier layer, the drain electrical contact including the non-gold-based metallic material of the one or more non-gold-based metallic materials; and
a capacitor including a first plate, a second plate, and a dielectric material disposed between the first plate and the second plate, wherein at least a portion of the first plate is disposed on at least one of the channel layer or the barrier layer; the second plate is disposed on the dielectric material; and the first plate and the second plate include the non-gold-based metallic material of the one or more non-gold-based metallic materials.