US 12,087,697 B2
Semiconductor devices with recessed pads for die stack interconnections
Ruei Ying Sheng, Taichung (TW); Andrew M. Bayless, Boise, ID (US); and Brandon P. Wirz, Boise, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jun. 26, 2023, as Appl. No. 18/214,378.
Application 18/214,378 is a division of application No. 17/237,496, filed on Apr. 22, 2021, granted, now 11,715,696.
Prior Publication US 2023/0352413 A1, Nov. 2, 2023
Int. Cl. H01L 23/538 (2006.01); H01L 21/48 (2006.01); H01L 21/50 (2006.01); H01L 21/768 (2006.01); H01L 25/065 (2023.01)
CPC H01L 23/5384 (2013.01) [H01L 21/486 (2013.01); H01L 21/50 (2013.01); H01L 21/76802 (2013.01); H01L 21/76877 (2013.01); H01L 23/5386 (2013.01); H01L 25/0657 (2013.01)] 20 Claims
OG exemplary drawing
 
19. A method of forming a semiconductor assembly, the method comprising:
assembling a die stack including a plurality of semiconductor dies, wherein each semiconductor die includes:
a first surface including a first insulating material,
a second surface opposite the first surface, the second surface including a second insulating material,
a recess in the first surface, and
a conductive pad within the recess,
wherein neighboring semiconductor dies in the die stack are directly coupled to each other via the respective first and second insulating materials of the neighboring semiconductor dies; and
electrically coupling a conductive structure to each of the plurality of semiconductor dies, wherein the conductive structure includes:
a monolithic via extending through each of the semiconductor dies in the die stack, and
a plurality of protrusions extending laterally from the monolithic via, wherein the plurality of protrusions and the monolithic via are made of a continuous material, and wherein each protrusion is positioned within the recess of a respective one of the semiconductor dies and is electrically coupled to the conductive pad within the recess.