US 12,087,657 B2
Semiconductor packages
Woojae Kim, Hwaseong-si (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Dec. 15, 2021, as Appl. No. 17/551,710.
Claims priority of application No. 10-2021-0065565 (KR), filed on May 21, 2021.
Prior Publication US 2022/0375812 A1, Nov. 24, 2022
Int. Cl. H01L 23/367 (2006.01); H01L 23/00 (2006.01); H01L 23/433 (2006.01)
CPC H01L 23/3675 (2013.01) [H01L 23/433 (2013.01); H01L 24/16 (2013.01); H01L 24/32 (2013.01); H01L 24/73 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73204 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A semiconductor package, comprising:
a package substrate;
a semiconductor chip on the package substrate;
a heat dissipation structure on the package substrate, the heat dissipation structure including a center portion and an edge portion;
a dam structure on a bottom surface of the center portion of the heat dissipation structure, the dam structure on a top surface of the semiconductor chip; and
a heat conductive layer between the center portion of the heat dissipation structure and the semiconductor chip,
wherein a top surface of the dam structure is located at a same distance from a top surface of the package substrate in a vertical direction as a top surface of the heat conductive layer, wherein the vertical direction is perpendicular to the top surface of the package substrate, and
the heat conductive layer has a portion that extends vertically between a bottommost surface of the dam structure and the top surface of the semiconductor chip.