US 12,087,650 B2
Interposer and semiconductor package including the same
Junyoung Oh, Seoul (KR); Hyunggil Baek, Suwon-si (KR); Seunghwan Kim, Anyang-si (KR); Jungjoo Kim, Hwaseong-si (KR); Jongho Park, Cheonan-si (KR); and Yongkwan Lee, Hwaseong-si (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on May 11, 2023, as Appl. No. 18/315,558.
Application 18/315,558 is a continuation of application No. 17/098,748, filed on Nov. 16, 2020, granted, now 11,688,656.
Claims priority of application No. 10-2020-0044782 (KR), filed on Apr. 13, 2020.
Prior Publication US 2023/0282533 A1, Sep. 7, 2023
Int. Cl. H01L 23/16 (2006.01); H01L 23/31 (2006.01); H01L 23/498 (2006.01); H01L 23/538 (2006.01); H01L 25/065 (2023.01)
CPC H01L 23/16 (2013.01) [H01L 23/3128 (2013.01); H01L 23/49811 (2013.01); H01L 23/5389 (2013.01); H01L 25/0657 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor package, the method comprising:
mounting a semiconductor chip on a package substrate;
disposing an interposer on the semiconductor chip, the interposer comprising
an interposer substrate comprising an upper conductive pad, and
a dam structure including an opening overlapping the upper conductive pad and extending along an edge of the upper conductive pad; and
forming a molding layer covering at least a portion of an upper surface of the interposer and at least a portion of the semiconductor chip,
wherein the forming of the molding layer comprises
disposing a molding film on the interposer to be in contact with an upper surface of the dam structure,
supplying a molding material into a space overlapping a lower surface of the molding film and the upper surface of the interposer substrate such that the molding material covers at least the portion of the upper surface of the interposer and at least the portion of the semiconductor chip,
hardening the molding material, and
removing the molding film.