US 12,087,624 B2
Beol tip-to-tip shorting and time dependent dielectric breakdown
Chanro Park, Clifton Park, NY (US); Koichi Motoyama, Clifton Park, NY (US); Kenneth Chun Kuen Cheng, Shatin (HK); and Chih-Chao Yang, Glenmont, NY (US)
Assigned to International Business Machines Corporation, Armonk, NY (US)
Filed by International Business Machines Corporation, Armonk, NY (US)
Filed on Sep. 21, 2021, as Appl. No. 17/481,198.
Prior Publication US 2023/0090755 A1, Mar. 23, 2023
Int. Cl. H01L 21/768 (2006.01); H01L 23/528 (2006.01); H01L 23/532 (2006.01)
CPC H01L 21/76846 (2013.01) [H01L 21/76831 (2013.01); H01L 21/76849 (2013.01); H01L 21/76865 (2013.01); H01L 21/76883 (2013.01); H01L 23/5283 (2013.01); H01L 23/53295 (2013.01); H01L 23/53238 (2013.01)] 9 Claims
OG exemplary drawing
 
1. A semiconductor structure comprising:
a dielectric layer on top of and in contact with a substrate; a conductive line located within the dielectric layer;
a barrier layer on top of and in contact with the dielectric layer, wherein the barrier layer is below a liner layer;
the liner layer on top of and in contact with the barrier layer and below and in contact with the conductive line;
a metal liner on top of and in contact with the conductive line, wherein a portion of the metal liner contacts a sidewall of the conductive line; and
a capping layer on top of and in contact with the dielectric layer, the barrier layer, the liner layer and the metal liner.