US 12,087,390 B2
Storage device based on daisy chain topology
Jeffrey E. Kwak, Gyeonggi-do (KR); Jae Hoon Ko, Gyeonggi-do (KR); Jong Joo Lee, Gyeonggi-do (KR); Kyung Woo Kim, Gyeonggi-do (KR); and Hee Ju Kim, Gyeonggi-do (KR)
Assigned to SK hynix Inc., Gyeonggi-do (KR)
Filed by SK hynix Inc., Gyeonggi-do (KR)
Filed on Jan. 28, 2022, as Appl. No. 17/587,056.
Claims priority of application No. 10-2021-0128800 (KR), filed on Sep. 29, 2021.
Prior Publication US 2023/0116063 A1, Apr. 13, 2023
Int. Cl. G11C 7/10 (2006.01); G11C 8/18 (2006.01)
CPC G11C 7/1063 (2013.01) [G11C 7/106 (2013.01); G11C 7/1087 (2013.01); G11C 7/109 (2013.01); G11C 8/18 (2013.01)] 9 Claims
OG exemplary drawing
 
1. A storage device comprising:
a plurality of memory package chips each including a plurality of memory dies capable of storing data;
a controller configured to communicate with the plurality of memory package chips and connected to the plurality of memory package chips through one or more daisy chain circuits; and
a termination resistor connected to one or more of the daisy chain circuits,
wherein a structure in which the termination resistor is connected to the one or more daisy chain circuits is determined according to a terminal of the controller to which the one or more daisy chain circuits are connected,
wherein the termination resistor is connected between a first daisy chain circuit and a second daisy chain circuit of the daisy chain circuits, and
wherein the termination resistor is connected to a termination voltage input terminal.