| CPC G06N 7/01 (2023.01) [G01N 15/00 (2013.01); G06F 9/5011 (2013.01); G01N 2015/0003 (2013.01)] | 22 Claims |
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1. A computer program product having a non-transitory computer readable medium including circuit information representing a configuration of a circuit described by a hardware description language, wherein the circuit information causes the circuit to function as:
a calculation system comprising:
a calculation device configured to solve a quadratic unconstrained binary optimization (QUBO) problem of minimizing a quadratic function including N binary variables, N being an integer equal to or greater than 2;
a reception device configured to receive a packet including information indicative of a partial coefficient of A coefficients in A terms constituting the quadratic function, A being an integer equal to or greater than 2; and
a transfer circuit including a buffer memory that stores therein at least partial and a plurality of coefficients among the A coefficients,
wherein
the calculation device includes a memory that stores therein the A coefficients and calculates a solution to the QUBO problem based on the A coefficients stored in the memory; and
the transfer circuit
rewrites, when the reception device receives the packet, the partial coefficient indicated by information included in the received packet among the plurality of coefficients stored in the buffer memory, in accordance with the information included in the received packet, and
writes all the plurality of coefficients stored in the buffer memory into the memory of the calculation device, in a batch at a predefined timing.
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