US 12,086,593 B2
Capability-generating address calculating instruction
Lee Douglas Smith, Cambridge (GB)
Assigned to Arm Limited, Cambridge (GB)
Appl. No. 17/904,167
Filed by Arm Limited, Cambridge (GB)
PCT Filed Jan. 7, 2021, PCT No. PCT/GB2021/050032
§ 371(c)(1), (2) Date Aug. 12, 2022,
PCT Pub. No. WO2021/165634, PCT Pub. Date Aug. 26, 2021.
Claims priority of application No. 2002130 (GB), filed on Feb. 17, 2020.
Prior Publication US 2023/0085143 A1, Mar. 16, 2023
Int. Cl. G06F 9/30 (2018.01); G06F 9/355 (2018.01)
CPC G06F 9/3013 (2013.01) [G06F 9/30101 (2013.01); G06F 9/3016 (2013.01); G06F 9/30189 (2013.01); G06F 9/355 (2013.01); G06F 9/3557 (2013.01)] 19 Claims
OG exemplary drawing
 
18. A data processing method for an apparatus comprising processing circuitry hardware and a plurality of capability registers including a result capability register, each capability register to store a capability comprising a pointer and constraint metadata for constraining valid use of the pointer or the capability, the capability registers including a program counter capability register for which the pointer represents a program counter address indicative of a current point of program flow;
the data processing method comprising:
in response to a capability-generating address calculating instruction specifying an offset value, controlling the processing circuitry hardware to:
select a reference capability register as one of the program counter capability register and a further capability register; and
write to the result capability register a result capability for which the pointer of the result capability indicates a window address identifying a selected window within an address space, where a window comprises a contiguous block of addresses of a predetermined size, the selected window is offset from a reference window by a number of windows determined based on the offset value specified by the capability-generating address calculating instruction, and the reference window comprises the window which comprises an address indicated by the pointer of the reference capability register.