US 12,086,469 B2
Resiliency and performance for cluster memory
Marcos K. Aguilera, Mountain View, CA (US); Keerthi Kumar, Bangalore (IN); Pramod Kumar, Bangalore (IN); Pratap Subrahmanyam, Saratoga, CA (US); Sairam Veeraswamy, Coimbatore (IN); and Rajesh Venkatasubramanian, Palo Alto, CA (US)
Assigned to VMware LLC, Palo Alto, CA (US)
Filed by VMware LLC, Palo Alto, CA (US)
Filed on May 5, 2023, as Appl. No. 18/312,987.
Application 18/312,987 is a continuation of application No. 17/481,335, filed on Sep. 22, 2021, granted, now 11,687,286.
Claims priority of application No. 202141032020 (IN), filed on Jul. 16, 2021.
Prior Publication US 2023/0273751 A1, Aug. 31, 2023
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0659 (2013.01) [G06F 3/0604 (2013.01); G06F 3/061 (2013.01); G06F 3/0631 (2013.01); G06F 3/067 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A system, comprising:
a computing device comprising a processor and a memory; and
machine-readable instructions stored in the memory that, when executed by the processor, cause the computing device to at least:
receive a page fault notification for a page stored by a memory host;
allocate a page in the memory for the page stored by the memory host;
identify the memory host storing the page;
identify resource constraints associated with the page stored by the memory host;
execute a read operation to retrieve the page stored by the memory host based at least in part on the resource constraints;
receive contents of the page stored by the memory host; and
copy the contents to the page in the memory.