US 12,086,458 B2
Programming content addressable memory
Tomoko Ogura Iwasaki, San Jose, CA (US); and Manik Advani, Fremont, CA (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Apr. 26, 2022, as Appl. No. 17/729,980.
Claims priority of provisional application 63/201,554, filed on May 4, 2021.
Prior Publication US 2022/0357876 A1, Nov. 10, 2022
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0656 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0679 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A system comprising:
a memory device comprising a programming buffer and a content addressable memory (CAM) block; and
a processing device, operatively coupled with the memory device, to perform operations comprising:
receiving a plurality of data entries to be stored at the memory device;
storing the plurality of data entries in a plurality of pages of the programming buffer, each of the plurality of pages of the programming buffer comprising a respective subset of the plurality of data entries; and
initiating a conversion operation to copy the plurality of data entries from the programming buffer to the CAM block, wherein the conversion operation comprises:
reading respective portions of each data entry in each respective subset of the plurality of data entries from the plurality of pages of the programming buffer; and
writing the respective portions to a single CAM page of the CAM block in one program operation, wherein each data entry spans a plurality of CAM pages in the CAM block.