CPC G06F 3/064 (2013.01) [G06F 3/0659 (2013.01); G06F 3/0688 (2013.01); G06F 9/3877 (2013.01); G06F 13/1678 (2013.01); G06N 3/082 (2013.01); G06F 3/0607 (2013.01)] | 20 Claims |
1. An apparatus, comprising:
a memory device comprising:
a memory array;
a processing resource; and
control circuitry coupled to the memory array and to the processing resource, configured to:
responsive to receipt of a first command from a host, cause the processing resource to be activated;
cause raw data to be transferred from the memory array to the processing resource via input output (I/O) lines in response to an access command, provided by the host, without a request to preprocess data;
cause instructions, received from the host, to be executed to process the raw data responsive to receipt of a second command from the host; and
responsive to executing the instructions, cause processed data to be transferred from the processing resource to the memory array via the I/O lines.
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