US 12,086,416 B2
Memory system for determining read wait time, memory controller, and method for operating memory system
Seon Ju Lee, Icheon (KR); and Jeong Sun Park, Icheon (KR)
Assigned to SK hynix Inc., Icheon (KR)
Filed by SK hynix Inc., Icheon (KR)
Filed on Nov. 22, 2022, as Appl. No. 18/058,183.
Claims priority of application No. 10-2022-0088819 (KR), filed on Jul. 19, 2022.
Prior Publication US 2024/0028210 A1, Jan. 25, 2024
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0613 (2013.01) [G06F 3/0659 (2013.01); G06F 3/0679 (2013.01)] 14 Claims
OG exemplary drawing
 
1. A memory system comprising:
a memory device including a plurality of planes; and
a memory controller configured to wait to receive one or more read commands from a reference time point, and read data, requested by the one or more read commands, from the memory device in response to a determination that it is possible to simultaneously read data divided and stored, as an M number of data units, in an M number of planes among the plurality of planes in response to the one or more read commands, M being a natural number.