US 12,086,120 B2
Compression for sparse data structures utilizing mode search approximation
Prasoonkumar Surti, Folsom, CA (US); Abhishek R. Appu, El Dorado Hills, CA (US); Karol Szerszen, Hillsboro, OR (US); Eric Liskay, Folsom, CA (US); and Karthik Vaidyanathan, San Francisco, CA (US)
Assigned to INTEL CORPORATION, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Dec. 15, 2022, as Appl. No. 18/066,436.
Application 18/066,436 is a continuation of application No. 16/371,342, filed on Apr. 1, 2019, granted, now 11,556,511.
Prior Publication US 2023/0252010 A1, Aug. 10, 2023
Int. Cl. G06F 16/22 (2019.01); G06N 20/00 (2019.01); G06T 1/20 (2006.01)
CPC G06F 16/2237 (2019.01) [G06N 20/00 (2019.01); G06T 1/20 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An apparatus comprising:
one or more processors, the one or processors including a graphics processor; and
a memory for storage of data, including one or more data structures;
wherein the one or more processors are to process a data structure including a plurality of values, the processing of the data structure including the one or more processors to:
perform a first compression operation on the data structure, including approximating a most repeated value in the data structure and generating a first output based at least in part on instances of the most repeated value in the data structure;
perform a second compression operation on the data structure, including performing a delta compression operation to generate a second output; and
determine whether either the first compression operation or the second compression operation is successful in generating a compressed output, and select either the first output or the second output as a compressed output vector for the data structure based at least in part on the determination of success in generating a compressed output.