CPC G06F 13/4221 (2013.01) [G06F 2213/0026 (2013.01)] | 9 Claims |
1. A multichip system, comprising:
a transmitter-end chip, comprising a first port;
a receiver-end chip, comprising a second port, the first port being connected to the second port, and an operating mode of the first port being different from an operating mode of the second port; and
a bridge chip, comprising a third port and a fourth port, the third port coupled to the first port, the fourth port coupled to the second port, and an operating mode of the third port being different from an operating mode of the fourth port;
wherein, the transmitter-end chip determines a first target address of the receiver-end chip with respect to the transmitter-end chip, and transfers a command to the receiver-end chip according to the first target address; and
wherein the transmitter-end chip further determines a second target address of the bridge chip with respect to the transmitter-end chip according to an identifier of the first port and an identifier of a bus between the first port and the third port, determines a third target address of the receiver-end chip with respect to the bridge chip according to an identifier of the fourth port and an identifier of a bus between the fourth port and the second port, and determines the first target address according to the second target address and the third target address.
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