US 12,086,009 B2
Using a hardware-based controller for power state management
Alexander J. Branover, Boxborough, MA (US); Thomas J. Gibney, Boxborough, MA (US); Mihir Shaileshbhai Doctor, Santa Clara, CA (US); Indrani Paul, Austin, TX (US); Benjamin Tsien, Santa Clara, CA (US); Stephen V. Kosonocky, Fort Collins, CO (US); John P. Petry, San Diego, CA (US); and Christopher T. Weaver, Boxborough, MA (US)
Assigned to Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed by Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed on Mar. 31, 2022, as Appl. No. 17/710,521.
Prior Publication US 2023/0315188 A1, Oct. 5, 2023
Int. Cl. G06F 1/32 (2019.01); G06F 1/3234 (2019.01)
CPC G06F 1/3234 (2013.01) 20 Claims
OG exemplary drawing
 
1. A method for transitioning, a system on a chip (SoC) into different power states, comprising:
tracking metrics associated with the SoC; and
transitioning the SoC from a first power state to a second power state based on at least one of the tracked metrics, wherein a total amount of power that is used by at least a portion of the transition between the first power state to the second power state and a time spent in the second power state is less than a total amount of power that would have been used by remaining in the first power state;
wherein the at least one of the tracked metrics is associated with a rate of messages received by processing units associated with the SoC, wherein the rate of messages is weighted by processing unit.