US 12,085,842 B2
Imaging device and electronic apparatus for flare reduction in an on-chip lens array
Yoichi Ootsuka, Kanagawa (JP)
Assigned to SONY SEMICONDUCTOR SOLUTIONS CORPORATION, Kanagawa (JP)
Appl. No. 17/421,463
Filed by SONY SEMICONDUCTOR SOLUTIONS CORPORATION, Kanagawa (JP)
PCT Filed Jan. 9, 2020, PCT No. PCT/JP2020/000457
§ 371(c)(1), (2) Date Jul. 8, 2021,
PCT Pub. No. WO2020/149207, PCT Pub. Date Jul. 23, 2020.
Claims priority of application No. 2019-006276 (JP), filed on Jan. 17, 2019.
Prior Publication US 2022/0066309 A1, Mar. 3, 2022
Int. Cl. G03B 30/00 (2021.01); G02B 3/00 (2006.01); G02B 5/20 (2006.01); H04N 5/33 (2023.01)
CPC G03B 30/00 (2021.01) [G02B 3/0056 (2013.01); G02B 5/201 (2013.01); H04N 5/33 (2013.01)] 19 Claims
OG exemplary drawing
 
1. An imaging device, comprising:
a light reception section that includes a plurality of pixels, wherein each pixel of the plurality of pixels is configured to:
receive first light in a wavelength region; and
perform photoelectric conversion based on the reception of the first light;
a plurality of on-chip lenses on a light incident side of the light reception section,
wherein the plurality of on-chip lenses is at a pitch less than a length of a first wavelength on a longest wavelength side of the wavelength region;
a transparent substrate on a light incident side of the plurality of on-chip lenses; and
an embedded layer between the transparent substrate and the plurality of on-chip lenses, wherein
the embedded layer seals surfaces of the plurality of on-chip lenses, and
the embedded layer includes a light-transmissive material having a refractive index lower than a refractive index of each on-chip lens of the plurality of on-chip lenses.