US 12,085,595 B2
Read-out circuit for a capacitive sensor
Minsung Kim, Gwacheon-si (KR); Suhwan Kim, Seoul (KR); and Hyunjoong Lee, Daejeon (KR)
Assigned to Gwanak Analog CO., LTD, Seoul (KR); and Seoul National University R&DB Foundation, Seoul (KR)
Filed by Gwanak Analog CO., LTD., Seoul (KR); and Seoul National University R&DB Foundation, Seoul (KR)
Filed on Oct. 13, 2022, as Appl. No. 17/965,539.
Application 17/965,539 is a continuation of application No. PCT/KR2021/004970, filed on Apr. 21, 2021.
Claims priority of application No. 10-2020-0050392 (KR), filed on Apr. 24, 2020.
Prior Publication US 2023/0036880 A1, Feb. 2, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G01R 27/26 (2006.01); H03F 3/45 (2006.01); G01D 5/24 (2006.01)
CPC G01R 27/2605 (2013.01) [H03F 3/45475 (2013.01); G01D 5/24 (2013.01); H03F 2203/45116 (2013.01)] 14 Claims
OG exemplary drawing
 
1. A read-out circuit comprising:
an operational amplifier configured to receive input voltage via a positive input terminal;
a feedback capacitor connected between an output terminal of the operational amplifier and a negative input terminal of the operational amplifier;
a sensor charging/discharging circuit configured to charge or to discharge a sensor capacitor during a first time;
an offset removal circuit including an offset capacitor connected between a first node and a second node and configured to charge or discharge the offset capacitor during the first time;
a first switching circuit configured to provide a power supply voltage or a ground voltage to the first node during the first time; and
a second switching circuit configured to connect the operational amplifier and the offset removal circuit and to connect the offset removal circuit and the sensor capacitor during the second time after the sensor capacitor is charged or discharged.