US 11,758,719 B2
Three-dimensional semiconductor device
Sung Min Hwang, Hwaseong-si (KR); Joon Sung Lim, Seongnam-si (KR); Bum Kyu Kang, Suwon-si (KR); and Jae Ho Ahn, Seoul (KR)
Assigned to Samsung Electronics Co., Ltd.
Filed on Aug. 2, 2021, as Appl. No. 17/391,289.
Application 17/391,289 is a continuation of application No. 16/543,535, filed on Aug. 17, 2019, granted, now 11,088,157.
Claims priority of application No. 10-2018-0128403 (KR), filed on Oct. 25, 2018.
Prior Publication US 2021/0358933 A1, Nov. 18, 2021
Int. Cl. H10B 41/27 (2023.01); H01L 23/535 (2006.01); G11C 16/04 (2006.01)
CPC H10B 41/27 (2023.02) [H01L 23/535 (2013.01); G11C 16/0483 (2013.01)] 20 Claims
OG exemplary drawing
1. A semiconductor device comprising:
a lower structure;
a stacked structure disposed in a first region and a second region and on the lower structure, the stacked structure including gate patterns stacked in a vertical direction, perpendicular to an upper surface of the lower structure, the stacked structure having a stepped shape in the second region; and
vertical channel structures disposed on the lower structure and penetrating through the gate patterns of the stack structure in the first region, wherein:
the stepped shape of the stacked structure includes a first downwardly stepped region, a first cliff region, a first upwardly stepped region, a second cliff region, a second downwardly stepped region that are sequentially arranged in the second region in a first direction, and
an upper end of the first upwardly stepped region is substantially at the same level as an upper region of the first cliff region.