US 11,757,550 B2
Ethernet interface and related systems, methods and devices
Venkatraman Iyer, Austin, TX (US); Dixon Chen, Guangdong (CN); John Junling Zang, Guangdong (CN); and Shivanand I. Akkihal, Austin, TX (US)
Assigned to Microchip Technology Incorporated, Chandler, AZ (US)
Filed by Microchip Technology Incorporated, Chandler, AZ (US)
Filed on Oct. 28, 2021, as Appl. No. 17/452,661.
Application 17/452,661 is a continuation of application No. 16/684,419, filed on Nov. 14, 2019, granted, now 11,171,732.
Claims priority of application No. 201910784382.4 (CN), filed on Aug. 23, 2019.
Prior Publication US 2022/0052775 A1, Feb. 17, 2022
Int. Cl. H04J 3/06 (2006.01)
CPC H04J 3/062 (2013.01) 20 Claims
OG exemplary drawing
1. A method, comprising:
clocking, using a first clock, a datapath of an Ethernet physical layer at a first clock rate; and
clocking, using a second clock generated based on the first clock, a first interface for operatively coupling the Ethernet physical layer with an Ethernet link layer, wherein clocking the first interface comprises clocking the first interface at a second clock rate that is substantially equal to a bit rate of the first interface.