US 11,757,001 B2
Radiation hardened high voltage superjunction MOSFET
Kiraneswar Muthuseenu, Tempe, AZ (US); Samuel Anderson, Tempe, AZ (US); and Takeshi Ishiguro, Fukushima (JP)
Assigned to IceMos Technology Limited
Filed by IceMos Technology Limited, Belfast (GB)
Filed on May 27, 2022, as Appl. No. 17/804,491.
Application 17/804,491 is a continuation of application No. 16/934,738, filed on Jul. 21, 2020, granted, now 11,362,179.
Prior Publication US 2022/0293733 A1, Sep. 15, 2022
Int. Cl. H01L 29/08 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 29/10 (2006.01); H01L 21/265 (2006.01)
CPC H01L 29/0847 (2013.01) [H01L 29/0634 (2013.01); H01L 29/1095 (2013.01); H01L 29/4236 (2013.01); H01L 29/66666 (2013.01); H01L 29/7827 (2013.01); H01L 21/26513 (2013.01)] 24 Claims
OG exemplary drawing
1. A method of making a semiconductor device, comprising:
providing a substrate;
disposing a semiconductor layer over the substrate;
forming a first trench through the semiconductor layer;
forming a second trench through the semiconductor layer;
forming a plug region in the semiconductor layer extending between the first trench and second trench;
forming a body region within the plug region;
forming a source/drain region extending across a portion of the plug region and further extending across a portion of the body region;
forming a gate trench adjacent to the source/drain region and extending through the body region to the semiconductor layer;
disposing a dielectric layer within the gate trench; and
disposing a trench gate electrode within the gate trench.