US 11,755,489 B2
Configurable interface circuit
Rohit K. Gupta, Santa Clara, CA (US); Rohit Natarajan, Sunnyvale, CA (US); Jurgen M. Schulz, Pleasanton, CA (US); Harshavardhan Kaushikkar, Santa Clara, CA (US); and Connie W. Cheung, Sunnyvale, CA (US)
Assigned to Apple Inc., Cupertino, CA (US)
Filed by Apple Inc., Cupertino, CA (US)
Filed on Aug. 31, 2021, as Appl. No. 17/463,292.
Prior Publication US 2023/0064369 A1, Mar. 2, 2023
Int. Cl. G06F 12/0871 (2016.01); G06F 13/16 (2006.01); G06F 12/02 (2006.01); G06F 3/06 (2006.01)
CPC G06F 12/0871 (2013.01) [G06F 3/0607 (2013.01); G06F 3/067 (2013.01); G06F 3/0664 (2013.01); G06F 12/0238 (2013.01); G06F 13/1673 (2013.01)] 20 Claims
OG exemplary drawing
1. An apparatus, comprising:
an integrated circuit (IC) having a particular configuration, wherein the IC includes:
a memory system;
a communication fabric coupled to the memory system;
a plurality of agent circuits configured to make requests to the memory system that are in a first format that is not specific to the particular configuration of the IC;
a plurality of interface circuits coupled between corresponding ones of the plurality of agent circuits and the communication fabric, wherein a given one of the plurality of interface circuits is configured to receive a request to the memory system in the first format and output the request in a second format that is specific to the particular configuration of the IC;
wherein the given one of the plurality of interface circuits includes a corresponding interface logic circuit and a corresponding register file, wherein the interface logic circuit is configured to initiate communications with components of the memory system in response to receiving a request from a correspondingly coupled agent, translate communications between the correspondingly coupled agent and the memory system between a non-configuration specific format and a configuration specific format, and to store information obtained from the request in one or more registers of the register file.